In recent years, for the purpose of, for example, size reduction or space reduction of substrates that include electronic components such as semiconductor chips, there is proposed a so-called “built-in electronic component type wiring substrate” that has an electronic component (e.g., semiconductor chip) installed therein (hereinafter also referred to as “built-in electronic component substrate”).
One example of the built-in electronic component substrate includes a first substrate to which a semiconductor chip is flip-chip bonded in a face-down state and a second substrate layered on the first substrate interposed by a substrate connection member (e.g., solder ball), wherein the semiconductor chip is encapsulated with resin between the first and second substrates.
The processes for manufacturing the built-in electronic component substrate includes, for example, a process of manufacturing the first substrate onto which the semiconductor chip is mounted, a process of manufacturing the second substrate onto which the substrate connection member is mounted, and a process of layering the second substrate on the first substrate in a state where a substrate connection member mounting surface (i.e. surface for mounting the substrate connection member thereon) and a semiconductor chip mounting surface (i.e. surface for mounting the semiconductor chip thereon) face each other. After the above-described processes, a resin is supplied to fill in-between the first and the second substrates. Thereby, manufacturing of the built-in electronic-component substrate is completed.
[Patent Document 1]: Japanese Laid-Open Patent Publication No. 2003-347722
From the standpoint of reliability, resin is also supplied to fill in a space between a back surface of the semiconductor chip and the second substrate in the above-described resin filling-in process. Therefore, a sufficient space is to be provided between the back surface of the semiconductor chip and the second substrate, so that resin can fill in the space. Accordingly, the size of the substrate connection member is determined by taking into consideration the space between the back surface of the semiconductor chip and the second substrate. If the space between the back surface of the semiconductor chip and the second substrate becomes narrower than 40 μm, it becomes difficult for resin to fill the space. Therefore, the space between the back surface of the semiconductor chip and the second substrate is, normally, set to be greater than or equal to 40 μm.
In a case of attempting to reduce the thickness of a built-in electronic component substrate by reducing the space between the back surface of the semiconductor chip and the second substrate, there is a risk that resin cannot be sufficiently supplied to fill the space between the back surface of the semiconductor chip and the second substrate. If resin does not sufficiently fill in-between the back surface of the semiconductor chip and the second substrate, voids may be generated in the space between the back surface of the semiconductor chip and the second substrate. In a case where voids are generated, the voids may become enlarged by absorbing moisture. Thereby, peeling of resin may occur in the vicinity of the voids. As a result, reliability of the built-in electronic component substrate is degraded.
In other words, with a built-in electronic component substrate having the above-described configuration, a sufficient space between the back surface of the semiconductor chip and the second substrate becomes necessary for ensuring resin fillability with resin. Thus, the reduction of the thickness of the built-in electronic component substrate becomes difficult.